420 lines
12 KiB
C
420 lines
12 KiB
C
// NOTE: Sim8086 ///////////////////////////////////////////////////////////////////////////////////
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typedef enum S86_OpDecodeType {
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S86_OpDecodeType_MOVRegOrMemToOrFromReg,
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S86_OpDecodeType_MOVImmediateToRegOrMem,
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S86_OpDecodeType_MOVImmediateToReg,
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S86_OpDecodeType_MOVMemToAccum,
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S86_OpDecodeType_MOVAccumToMem,
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S86_OpDecodeType_MOVRegOrMemToSegReg,
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S86_OpDecodeType_MOVSegRegToRegOrMem,
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S86_OpDecodeType_PUSHRegOrMem,
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S86_OpDecodeType_PUSHReg,
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S86_OpDecodeType_PUSHSegReg,
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S86_OpDecodeType_POPRegOrMem,
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S86_OpDecodeType_POPReg,
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S86_OpDecodeType_POPSegReg,
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S86_OpDecodeType_XCHGRegOrMemWithReg,
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S86_OpDecodeType_XCHGRegWithAccum,
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S86_OpDecodeType_INFixedPort,
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S86_OpDecodeType_INVariablePort,
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S86_OpDecodeType_OUTFixedPort,
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S86_OpDecodeType_OUTVariablePort,
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S86_OpDecodeType_XLAT,
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S86_OpDecodeType_LEA,
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S86_OpDecodeType_LDS,
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S86_OpDecodeType_LES,
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S86_OpDecodeType_LAHF,
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S86_OpDecodeType_SAHF,
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S86_OpDecodeType_PUSHF,
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S86_OpDecodeType_POPF,
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S86_OpDecodeType_ADDRegOrMemToOrFromReg,
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S86_OpDecodeType_ADDImmediateToRegOrMem,
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S86_OpDecodeType_ADDImmediateToAccum,
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S86_OpDecodeType_ADCRegOrMemWithRegToEither,
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S86_OpDecodeType_ADCImmediateToRegOrMem,
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S86_OpDecodeType_ADCImmediateToAccum,
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S86_OpDecodeType_INCRegOrMem,
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S86_OpDecodeType_INCReg,
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S86_OpDecodeType_AAA,
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S86_OpDecodeType_DAA,
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S86_OpDecodeType_SUBRegOrMemToOrFromReg,
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S86_OpDecodeType_SUBImmediateFromRegOrMem,
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S86_OpDecodeType_SUBImmediateFromAccum,
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S86_OpDecodeType_SBBRegOrMemAndRegToEither,
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S86_OpDecodeType_SBBImmediateFromRegOrMem,
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S86_OpDecodeType_SBBImmediateFromAccum,
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S86_OpDecodeType_DECRegOrMem,
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S86_OpDecodeType_DECReg,
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S86_OpDecodeType_NEG,
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S86_OpDecodeType_CMPRegOrMemAndReg,
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S86_OpDecodeType_CMPImmediateWithRegOrMem,
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S86_OpDecodeType_CMPImmediateWithAccum,
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S86_OpDecodeType_AAS,
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S86_OpDecodeType_DAS,
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S86_OpDecodeType_MUL,
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S86_OpDecodeType_IMUL,
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S86_OpDecodeType_AAM,
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S86_OpDecodeType_DIV,
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S86_OpDecodeType_IDIV,
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S86_OpDecodeType_AAD,
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S86_OpDecodeType_CBW,
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S86_OpDecodeType_CWD,
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S86_OpDecodeType_NOT,
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S86_OpDecodeType_SHL_SAL,
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S86_OpDecodeType_SHR,
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S86_OpDecodeType_SAR,
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S86_OpDecodeType_ROL,
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S86_OpDecodeType_ROR,
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S86_OpDecodeType_RCL,
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S86_OpDecodeType_RCR,
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S86_OpDecodeType_ANDRegWithMemToEither,
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S86_OpDecodeType_ANDImmediateToRegOrMem,
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S86_OpDecodeType_ANDImmediateToAccum,
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S86_OpDecodeType_TESTRegOrMemAndReg,
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S86_OpDecodeType_TESTImmediateAndRegOrMem,
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S86_OpDecodeType_TESTImmediateAndAccum,
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S86_OpDecodeType_ORRegOrMemAndRegToEither,
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S86_OpDecodeType_ORImmediateToRegOrMem,
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S86_OpDecodeType_ORImmediateToAccum,
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S86_OpDecodeType_XORRegOrMemAndRegToEither,
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S86_OpDecodeType_XORImmediateToRegOrMem,
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S86_OpDecodeType_XORImmediateToAccum,
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S86_OpDecodeType_REP,
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S86_OpDecodeType_CALLDirectWithinSeg,
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S86_OpDecodeType_CALLIndirectWithinSeg,
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S86_OpDecodeType_CALLDirectInterSeg,
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S86_OpDecodeType_CALLIndirectInterSeg,
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S86_OpDecodeType_JMPDirectWithinSeg,
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S86_OpDecodeType_JMPDirectWithinSegShort,
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S86_OpDecodeType_JMPIndirectWithinSeg,
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S86_OpDecodeType_JMPDirectInterSeg,
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S86_OpDecodeType_JMPIndirectInterSeg,
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S86_OpDecodeType_RETWithinSeg,
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S86_OpDecodeType_RETWithinSegAddImmediateToSP,
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S86_OpDecodeType_RETInterSeg,
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S86_OpDecodeType_RETInterSegAddImmediateToSP,
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S86_OpDecodeType_JE_JZ,
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S86_OpDecodeType_JL_JNGE,
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S86_OpDecodeType_JLE_JNG,
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S86_OpDecodeType_JB_JNAE,
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S86_OpDecodeType_JBE_JNA,
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S86_OpDecodeType_JP_JPE,
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S86_OpDecodeType_JO,
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S86_OpDecodeType_JS,
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S86_OpDecodeType_JNE_JNZ,
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S86_OpDecodeType_JNL_JGE,
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S86_OpDecodeType_JNLE_JG,
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S86_OpDecodeType_JNB_JAE,
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S86_OpDecodeType_JNBE_JA,
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S86_OpDecodeType_JNP_JO,
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S86_OpDecodeType_JNO,
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S86_OpDecodeType_JNS,
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S86_OpDecodeType_LOOP,
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S86_OpDecodeType_LOOPZ_LOOPE,
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S86_OpDecodeType_LOOPNZ_LOOPNE,
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S86_OpDecodeType_JCXZ,
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S86_OpDecodeType_INT,
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S86_OpDecodeType_INT3,
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S86_OpDecodeType_INTO,
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S86_OpDecodeType_IRET,
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S86_OpDecodeType_CLC,
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S86_OpDecodeType_CMC,
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S86_OpDecodeType_STC,
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S86_OpDecodeType_CLD,
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S86_OpDecodeType_STD,
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S86_OpDecodeType_CLI,
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S86_OpDecodeType_STI,
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S86_OpDecodeType_HLT,
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S86_OpDecodeType_WAIT,
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S86_OpDecodeType_LOCK,
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S86_OpDecodeType_SEGMENT,
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S86_OpDecodeType_Count,
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} S86_OpDecodeType;
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typedef enum S86_Mnemonic {
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S86_Mnemonic_MOV,
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S86_Mnemonic_PUSH,
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S86_Mnemonic_POP,
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S86_Mnemonic_XCHG,
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S86_Mnemonic_IN,
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S86_Mnemonic_OUT,
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S86_Mnemonic_XLAT,
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S86_Mnemonic_LEA,
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S86_Mnemonic_LDS,
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S86_Mnemonic_LES,
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S86_Mnemonic_LAHF,
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S86_Mnemonic_SAHF,
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S86_Mnemonic_PUSHF,
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S86_Mnemonic_POPF,
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S86_Mnemonic_ADD,
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S86_Mnemonic_ADC,
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S86_Mnemonic_INC,
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S86_Mnemonic_AAA,
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S86_Mnemonic_DAA,
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S86_Mnemonic_SUB,
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S86_Mnemonic_SBB,
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S86_Mnemonic_DEC,
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S86_Mnemonic_NEG,
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S86_Mnemonic_CMP,
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S86_Mnemonic_AAS,
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S86_Mnemonic_DAS,
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S86_Mnemonic_MUL,
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S86_Mnemonic_IMUL,
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S86_Mnemonic_AAM,
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S86_Mnemonic_DIV,
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S86_Mnemonic_IDIV,
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S86_Mnemonic_AAD,
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S86_Mnemonic_CBW,
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S86_Mnemonic_CWD,
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S86_Mnemonic_NOT,
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S86_Mnemonic_SHL_SAL,
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S86_Mnemonic_SHR,
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S86_Mnemonic_SAR,
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S86_Mnemonic_ROL,
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S86_Mnemonic_ROR,
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S86_Mnemonic_RCL,
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S86_Mnemonic_RCR,
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S86_Mnemonic_AND,
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S86_Mnemonic_TEST,
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S86_Mnemonic_OR,
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S86_Mnemonic_XOR,
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S86_Mnemonic_REP,
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S86_Mnemonic_CALL,
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S86_Mnemonic_JMP,
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S86_Mnemonic_RET,
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S86_Mnemonic_JE_JZ,
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S86_Mnemonic_JL_JNGE,
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S86_Mnemonic_JLE_JNG,
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S86_Mnemonic_JB_JNAE,
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S86_Mnemonic_JBE_JNA,
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S86_Mnemonic_JP_JPE,
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S86_Mnemonic_JO,
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S86_Mnemonic_JS,
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S86_Mnemonic_JNE_JNZ,
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S86_Mnemonic_JNL_JGE,
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S86_Mnemonic_JNLE_JG,
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S86_Mnemonic_JNB_JAE,
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S86_Mnemonic_JNBE_JA,
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S86_Mnemonic_JNP_JO,
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S86_Mnemonic_JNO,
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S86_Mnemonic_JNS,
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S86_Mnemonic_LOOP,
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S86_Mnemonic_LOOPZ_LOOPE,
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S86_Mnemonic_LOOPNZ_LOOPNE,
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S86_Mnemonic_JCXZ,
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S86_Mnemonic_INT,
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S86_Mnemonic_INT3,
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S86_Mnemonic_INTO,
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S86_Mnemonic_IRET,
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S86_Mnemonic_CLC,
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S86_Mnemonic_CMC,
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S86_Mnemonic_STC,
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S86_Mnemonic_CLD,
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S86_Mnemonic_STD,
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S86_Mnemonic_CLI,
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S86_Mnemonic_STI,
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S86_Mnemonic_HLT,
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S86_Mnemonic_WAIT,
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S86_Mnemonic_LOCK,
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S86_Mnemonic_SEGMENT,
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} S86_Mnemonic;
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/// Bit patterns and masks for decoding 8086 assembly. 8086 opcodes can be up
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/// to 2 bytes long and mixed with instruction specific control bits. These
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/// masks isolate the opcode bits from the bits can be checked after masking
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/// the binary instruction stream.
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///
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/// Instructions that do not have opcode bits in the 2nd byte will have the mask
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/// set to 0.
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typedef struct S86_OpDecode {
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S86_Mnemonic mnemonic;
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uint8_t op_mask0;
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uint8_t op_bits0;
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uint8_t op_mask1;
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uint8_t op_bits1;
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} S86_OpDecode;
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typedef enum S86_MnemonicOp {
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S86_MnemonicOp_Invalid,
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S86_MnemonicOp_AL,
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S86_MnemonicOp_CL,
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S86_MnemonicOp_DL,
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S86_MnemonicOp_BL,
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S86_MnemonicOp_AH,
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S86_MnemonicOp_CH,
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S86_MnemonicOp_DH,
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S86_MnemonicOp_BH,
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S86_MnemonicOp_AX,
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S86_MnemonicOp_CX,
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S86_MnemonicOp_DX,
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S86_MnemonicOp_BX,
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S86_MnemonicOp_SP,
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S86_MnemonicOp_BP,
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S86_MnemonicOp_SI,
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S86_MnemonicOp_DI,
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S86_MnemonicOp_BX_SI,
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S86_MnemonicOp_BX_DI,
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S86_MnemonicOp_BP_SI,
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S86_MnemonicOp_BP_DI,
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S86_MnemonicOp_DirectAddress,
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S86_MnemonicOp_Immediate,
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S86_MnemonicOp_ES,
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S86_MnemonicOp_CS,
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S86_MnemonicOp_SS,
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S86_MnemonicOp_DS,
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S86_MnemonicOp_MOVS,
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S86_MnemonicOp_CMPS,
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S86_MnemonicOp_SCAS,
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S86_MnemonicOp_LODS,
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S86_MnemonicOp_STOS,
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S86_MnemonicOp_DirectInterSegment,
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S86_MnemonicOp_Jump,
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S86_MnemonicOp_Count,
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} S86_MnemonicOp;
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typedef enum S86_EffectiveAddress {
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S86_EffectiveAddress_None,
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S86_EffectiveAddress_Src,
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S86_EffectiveAddress_Dest,
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} S86_EffectiveAddress;
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typedef enum S86_WordBytePrefix {
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S86_WordBytePrefix_None,
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S86_WordBytePrefix_Byte,
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S86_WordBytePrefix_Word,
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} S86_WordBytePrefix;
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typedef struct S86_Opcode {
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S86_OpDecodeType type;
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uint8_t byte_size; ///< Number of bytes used to encode this opcode
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S86_Mnemonic mnemonic; ///< Mnemonic type
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S86_EffectiveAddress effective_addr; ///< Src/dest op is an effective address calculation
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bool effective_addr_loads_mem; ///< Effective address uses '[]' notation to load address memory
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bool lock_prefix; ///< Prefix the opcode with "lock" instruction
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bool rep_prefix; ///< Prefix the opcode with "rep" instruction
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bool wide; ///< Opcode has the 'w' flag set
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S86_WordBytePrefix word_byte_prefix; ///< Opcode has the 'word' or 'byte' prefix
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S86_MnemonicOp src; ///< Source op for the mnemonic
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S86_MnemonicOp dest; ///< Destination op for the mnemonic
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int32_t displacement; ///< Opcode has displacement/data/offset
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int32_t immediate; ///< Immediate value when src/dest op is an immediate
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bool immediate_is_8bit; ///< Immediate was 8bit and sign extended
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S86_MnemonicOp seg_reg_prefix; ///< Segment register that should prefix the upcoming instruction
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uint32_t base_clocks; ///< Number of cycles required to complete this operation
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uint32_t effective_address_clocks; ///< Number of cycles required to complete this operation
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uint32_t transfer_penalty_clocks; ///< Number of extra cycles required to complete a word transfer
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} S86_Opcode;
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typedef enum S86_RegisterByte {
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S86_RegisterByte_Lo,
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S86_RegisterByte_Hi,
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S86_RegisterByte_Count,
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S86_RegisterByte_Nil,
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} S86_RegisterByte;
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typedef union S86_Register16 {
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uint16_t word;
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uint8_t bytes[S86_RegisterByte_Count];
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} S86_Register16;
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typedef struct S86_RegisterFileFlags {
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bool carry;
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bool zero;
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bool sign;
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bool overflow;
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bool parity;
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bool auxiliary_carry;
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} S86_RegisterFileFlags;
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typedef enum S86_RegisterFileRegArray {
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S86_RegisterFileRegArray_AX,
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S86_RegisterFileRegArray_BX,
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S86_RegisterFileRegArray_CX,
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S86_RegisterFileRegArray_DX,
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S86_RegisterFileRegArray_SP,
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S86_RegisterFileRegArray_BP,
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S86_RegisterFileRegArray_SI,
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S86_RegisterFileRegArray_DI,
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S86_RegisterFileRegArray_ES,
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S86_RegisterFileRegArray_CS,
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S86_RegisterFileRegArray_SS,
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S86_RegisterFileRegArray_DS,
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S86_RegisterFileRegArray_Count,
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} S86_RegisterFileRegArray;
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typedef struct S86_RegisterFile {
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S86_RegisterFileFlags flags;
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uint16_t instruction_ptr;
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union {
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struct {
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S86_Register16 ax;
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S86_Register16 bx;
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S86_Register16 cx;
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S86_Register16 dx;
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S86_Register16 sp;
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S86_Register16 bp;
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S86_Register16 si;
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S86_Register16 di;
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S86_Register16 es;
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S86_Register16 cs;
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S86_Register16 ss;
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S86_Register16 ds;
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} file;
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S86_Register16 array[S86_RegisterFileRegArray_Count];
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} reg;
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} S86_RegisterFile;
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bool S86_RegisterFileFlagsEq (S86_RegisterFileFlags lhs, S86_RegisterFileFlags rhs);
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S86_Str8 S86_MnemonicStr8 (S86_Mnemonic type);
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S86_MnemonicOp S86_MnemonicOpFromWReg (bool w, uint8_t reg);
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S86_MnemonicOp S86_MnemonicOpFromSR (uint8_t sr);
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S86_Str8 S86_MnemonicOpStr8 (S86_MnemonicOp type);
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bool S86_MnemonicOpIsAccumulator (S86_MnemonicOp type);
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bool S86_MnemonicOpIsRegister (S86_MnemonicOp type);
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S86_Str8 S86_RegisterFileRegArrayStr8(S86_RegisterFileRegArray type);
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void S86_PrintOpcodeMnemonicOp (S86_Opcode opcode, bool src);
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void S86_PrintOpcode (S86_Opcode opcode);
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void S86_DecodeEffectiveAddr (S86_Opcode *opcode, S86_BufferIterator *it, uint8_t rm, uint8_t mod, uint8_t w);
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