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perfaware/part1: Add support for some proc controls CLC/CLI/STI...

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doyle 2023-03-19 17:34:53 +11:00
parent 0e5daa2e4b
commit aaa49ffe9f
1 changed files with 54 additions and 16 deletions
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40
part1/sim8086.c
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@ -215,6 +215,16 @@ typedef enum S86_InstructionType {
S86_InstructionType_INTO, S86_InstructionType_INTO,
S86_InstructionType_IRET, S86_InstructionType_IRET,
S86_InstructionType_CLC,
S86_InstructionType_CMC,
S86_InstructionType_STC,
S86_InstructionType_CLD,
S86_InstructionType_STD,
S86_InstructionType_CLI,
S86_InstructionType_STI,
S86_InstructionType_HLT,
S86_InstructionType_WAIT,
S86_InstructionType_Count, S86_InstructionType_Count,
} S86_InstructionType; } S86_InstructionType;
@ -778,6 +788,25 @@ int main(int argc, char **argv)
.op_bits0 = 0b1100'1110, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("into")}, .op_bits0 = 0b1100'1110, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("into")},
[S86_InstructionType_IRET] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000, [S86_InstructionType_IRET] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1100'1111, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("iret")}, .op_bits0 = 0b1100'1111, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("iret")},
[S86_InstructionType_CLC] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'1000, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("clc")},
[S86_InstructionType_CMC] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'0101, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("cmc")},
[S86_InstructionType_STC] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'1001, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("stc")},
[S86_InstructionType_CLD] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'1100, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("cld")},
[S86_InstructionType_STD] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'1101, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("std")},
[S86_InstructionType_CLI] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'1010, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("cli")},
[S86_InstructionType_STI] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'1011, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("sti")},
[S86_InstructionType_HLT] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'0100, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("hlt")},
[S86_InstructionType_WAIT] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1001'1011, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("wait")},
}; };
S86_Str8 SEGMENT_REGISTER_NAME[] = { S86_Str8 SEGMENT_REGISTER_NAME[] = {
@ -1210,7 +1239,16 @@ int main(int argc, char **argv)
instruction_type == S86_InstructionType_RETWithinSeg || instruction_type == S86_InstructionType_RETWithinSeg ||
instruction_type == S86_InstructionType_INT3 || instruction_type == S86_InstructionType_INT3 ||
instruction_type == S86_InstructionType_INTO || instruction_type == S86_InstructionType_INTO ||
instruction_type == S86_InstructionType_IRET) { instruction_type == S86_InstructionType_IRET ||
instruction_type == S86_InstructionType_CLC ||
instruction_type == S86_InstructionType_CMC ||
instruction_type == S86_InstructionType_STC ||
instruction_type == S86_InstructionType_CLD ||
instruction_type == S86_InstructionType_STD ||
instruction_type == S86_InstructionType_CLI ||
instruction_type == S86_InstructionType_STI ||
instruction_type == S86_InstructionType_HLT ||
instruction_type == S86_InstructionType_WAIT) {
// NOTE: Mnemonic instruction only, already printed // NOTE: Mnemonic instruction only, already printed
S86_Print(S86_STR8("\n")); S86_Print(S86_STR8("\n"));
} else { } else {