perfaware/part1: Add support for DEC/NEG
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@ -126,6 +126,10 @@ typedef enum S86_InstructionType {
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S86_InstructionType_SBBImmediateFromRegOrMem,
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S86_InstructionType_SBBImmediateFromAccum,
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S86_InstructionType_DECRegOrMem,
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S86_InstructionType_DECReg,
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S86_InstructionType_NEG,
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S86_InstructionType_CMPRegOrMemAndReg,
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S86_InstructionType_CMPImmediateWithRegOrMem,
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S86_InstructionType_CMPImmediateWithAccum,
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@ -552,6 +556,13 @@ int main(int argc, char **argv)
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[S86_InstructionType_SBBImmediateFromAccum] = {.op_mask0 = 0b1111'1110, .op_mask1 = 0b0000'0000,
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.op_bits0 = 0b0001'1100, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("sbb")},
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[S86_InstructionType_DECRegOrMem] = {.op_mask0 = 0b1111'1110, .op_mask1 = 0b0011'1000,
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.op_bits0 = 0b1111'1110, .op_bits1 = 0b0000'1000, .mnemonic = S86_STR8("dec")},
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[S86_InstructionType_DECReg] = {.op_mask0 = 0b1111'1000, .op_mask1 = 0b0000'0000,
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.op_bits0 = 0b0100'1000, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("dec")},
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[S86_InstructionType_NEG] = {.op_mask0 = 0b1111'1110, .op_mask1 = 0b0011'1000,
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.op_bits0 = 0b1111'0110, .op_bits1 = 0b0001'1000, .mnemonic = S86_STR8("neg")},
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[S86_InstructionType_CMPRegOrMemAndReg] = {.op_mask0 = 0b1111'1100, .op_mask1 = 0b0000'0000,
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.op_bits0 = 0b0011'1000, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("cmp")},
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[S86_InstructionType_CMPImmediateWithRegOrMem] = {.op_mask0 = 0b1111'1100, .op_mask1 = 0b0011'1000,
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@ -661,20 +672,30 @@ int main(int argc, char **argv)
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S86_Print(instruction->mnemonic);
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switch (instruction_type) {
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case S86_InstructionType_POPRegOrMem: /*FALLTHRU*/
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case S86_InstructionType_INCRegOrMem: /*FALLTHRU*/
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case S86_InstructionType_DECRegOrMem: /*FALLTHRU*/
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case S86_InstructionType_NEG: /*FALLTHRU*/
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case S86_InstructionType_POPRegOrMem: /*FALLTHRU*/
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case S86_InstructionType_PUSHRegOrMem: {
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S86_ASSERT(op_code_size == 2);
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uint8_t mod = (op_code_bytes[1] & 0b1100'0000) >> 6;
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uint8_t rm = (op_code_bytes[1] & 0b0000'0111) >> 0;
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uint8_t w = instruction_type == S86_InstructionType_INCRegOrMem ? (op_code_bytes[0] & 0b0000'0001) : 1;
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S86_ASSERT(mod < 4); S86_ASSERT(rm < 8);
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uint8_t w = 1;
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if (instruction_type == S86_InstructionType_INCRegOrMem ||
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instruction_type == S86_InstructionType_DECRegOrMem ||
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instruction_type == S86_InstructionType_NEG) {
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w = op_code_bytes[0] & 0b0000'0001;
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}
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S86_EffectiveAddressStr8 effective_address = S86_EffectiveAddressCalc(&buffer_it, rm, mod, w);
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if (effective_address.data[0] == '[')
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S86_PrintFmt(" %s", w ? "word" : "byte");
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S86_PrintLnFmt(" %.*s", S86_STR8_FMT(effective_address));
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} break;
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case S86_InstructionType_DECReg: /*FALLTHRU*/
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case S86_InstructionType_INCReg: /*FALLTHRU*/
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case S86_InstructionType_XCHGRegWithAccum: /*FALLTHRU*/
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case S86_InstructionType_PUSHReg: /*FALLTHRU*/
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@ -686,6 +707,7 @@ int main(int argc, char **argv)
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if (instruction_type == S86_InstructionType_PUSHReg ||
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instruction_type == S86_InstructionType_POPReg ||
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instruction_type == S86_InstructionType_INCReg ||
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instruction_type == S86_InstructionType_DECReg ||
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instruction_type == S86_InstructionType_XCHGRegWithAccum) {
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uint8_t reg = (op_code_bytes[0] & 0b0000'0111) >> 0;
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reg_name = REGISTER_FIELD_ENCODING[/*w*/1][reg];
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