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perfaware/part1: Annotate switch block, listing 42 complete

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doyle 2023-03-19 19:21:56 +11:00
parent beff327a97
commit 8c76652940
1 changed files with 22 additions and 27 deletions
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37
part1/sim8086.c
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@ -890,7 +890,7 @@ int main(int argc, char **argv)
S86_Print(instruction->mnemonic); S86_Print(instruction->mnemonic);
switch (instruction_type) { switch (instruction_type) {
// NOTE: Instruction Pattern => [0b000'0000W | 0bAA00'0CCC | DISP-LO | DISP-HI] // NOTE: Instruction Pattern => [0b0000'0000W | 0bAA00'0CCC | DISP-LO | DISP-HI]
// Where, W: Optional, AA: mod, CCC: R/M // Where, W: Optional, AA: mod, CCC: R/M
case S86_InstructionType_JMPIndirectWithinSeg: /*FALLTHRU*/ case S86_InstructionType_JMPIndirectWithinSeg: /*FALLTHRU*/
case S86_InstructionType_CALLIndirectWithinSeg: /*FALLTHRU*/ case S86_InstructionType_CALLIndirectWithinSeg: /*FALLTHRU*/
@ -945,6 +945,8 @@ int main(int argc, char **argv)
S86_Print(S86_STR8("\n")); S86_Print(S86_STR8("\n"));
} break; } break;
// NOTE: Instruction Pattern => [0b0000'0000]
// Generally handles instructions with control bits in any position in the first byte
case S86_InstructionType_DECReg: /*FALLTHRU*/ case S86_InstructionType_DECReg: /*FALLTHRU*/
case S86_InstructionType_INCReg: /*FALLTHRU*/ case S86_InstructionType_INCReg: /*FALLTHRU*/
case S86_InstructionType_XCHGRegWithAccum: /*FALLTHRU*/ case S86_InstructionType_XCHGRegWithAccum: /*FALLTHRU*/
@ -974,7 +976,7 @@ int main(int argc, char **argv)
S86_PrintLnFmt(" %.*s", S86_STR8_FMT(reg_name)); S86_PrintLnFmt(" %.*s", S86_STR8_FMT(reg_name));
} break; } break;
// NOTE: Instruction Pattern => [0b000'000DW | 0bAABB'BCCC | DISP-LO | DISP-HI | DATA-LO | DATA-HI] // NOTE: Instruction Pattern => [0b0000'000DW | 0bAABB'BCCC | DISP-LO | DISP-HI | DATA-LO | DATA-HI]
// Where, D: optional, W: optional, AA: mod, BBB: reg, CCC: r/m // Where, D: optional, W: optional, AA: mod, BBB: reg, CCC: r/m
case S86_InstructionType_ADDRegOrMemToOrFromReg: /*FALLTHRU*/ case S86_InstructionType_ADDRegOrMemToOrFromReg: /*FALLTHRU*/
case S86_InstructionType_ADCRegOrMemWithRegToEither: /*FALLTHRU*/ case S86_InstructionType_ADCRegOrMemWithRegToEither: /*FALLTHRU*/
@ -1042,6 +1044,8 @@ int main(int argc, char **argv)
} }
} break; } break;
// NOTE: Instruction Pattern => [0b0000'00SW | 0bAAA00BBB | DISP-LO | DISP-HI | DATA-LO | DATA-HI]
// Where S: optional, W: optional, AAA: mod, BBB: rm
case S86_InstructionType_ADDImmediateToRegOrMem: /*FALLTHRU*/ case S86_InstructionType_ADDImmediateToRegOrMem: /*FALLTHRU*/
case S86_InstructionType_ADCImmediateToRegOrMem: /*FALLTHRU*/ case S86_InstructionType_ADCImmediateToRegOrMem: /*FALLTHRU*/
case S86_InstructionType_SUBImmediateFromRegOrMem: /*FALLTHRU*/ case S86_InstructionType_SUBImmediateFromRegOrMem: /*FALLTHRU*/
@ -1104,6 +1108,7 @@ int main(int argc, char **argv)
} }
} break; } break;
// NOTE: Instruction Pattern => [0b0000'W00W | DATA-LO | DATA-HI]
case S86_InstructionType_ADDImmediateToAccum: /*FALLTHRU*/ case S86_InstructionType_ADDImmediateToAccum: /*FALLTHRU*/
case S86_InstructionType_ADCImmediateToAccum: /*FALLTHRU*/ case S86_InstructionType_ADCImmediateToAccum: /*FALLTHRU*/
case S86_InstructionType_SUBImmediateFromAccum: /*FALLTHRU*/ case S86_InstructionType_SUBImmediateFromAccum: /*FALLTHRU*/
@ -1131,7 +1136,6 @@ int main(int argc, char **argv)
} else { } else {
w = (op_code_bytes[0] & 0b0000'1000) >> 3; w = (op_code_bytes[0] & 0b0000'1000) >> 3;
} }
uint8_t reg = (op_code_bytes[0] & 0b0000'0111) >> 0;
// NOTE: Parse data payload // NOTE: Parse data payload
// ============================================================= // =============================================================
@ -1145,6 +1149,7 @@ int main(int argc, char **argv)
// ============================================================= // =============================================================
S86_Str8 dest_register = {0}; S86_Str8 dest_register = {0};
if (instruction_type == S86_InstructionType_MOVImmediateToReg) { if (instruction_type == S86_InstructionType_MOVImmediateToReg) {
uint8_t reg = (op_code_bytes[0] & 0b0000'0111) >> 0;
dest_register = REGISTER_FIELD_ENCODING[w][reg]; dest_register = REGISTER_FIELD_ENCODING[w][reg];
} else { } else {
if (w) { if (w) {
@ -1158,6 +1163,7 @@ int main(int argc, char **argv)
S86_PrintLnFmt(" %.*s, %d", S86_STR8_FMT(dest_register), (int16_t)data); S86_PrintLnFmt(" %.*s, %d", S86_STR8_FMT(dest_register), (int16_t)data);
} break; } break;
// NOTE: Instruction Pattern => [0b0000'000W | DATA-LO]
case S86_InstructionType_INFixedPort: /*FALLTHRU*/ case S86_InstructionType_INFixedPort: /*FALLTHRU*/
case S86_InstructionType_INVariablePort: /*FALLTHRU*/ case S86_InstructionType_INVariablePort: /*FALLTHRU*/
case S86_InstructionType_OUTFixedPort: /*FALLTHRU*/ case S86_InstructionType_OUTFixedPort: /*FALLTHRU*/
@ -1184,23 +1190,6 @@ int main(int argc, char **argv)
S86_PrintLnFmt(" %s, %.*s", data_val, S86_STR8_FMT(accum_name)); S86_PrintLnFmt(" %s, %.*s", data_val, S86_STR8_FMT(accum_name));
} break; } break;
case S86_InstructionType_MOVAccumToMem: /*FALLTHRU*/
case S86_InstructionType_MOVMemToAccum: {
S86_ASSERT(op_code_size == 1);
uint16_t addr_lo = S86_BufferIteratorNextByte(&buffer_it);
uint16_t addr_hi = S86_BufferIteratorNextByte(&buffer_it);
uint16_t addr = (addr_hi << 8) | (addr_lo << 0);
S86_Str8 fmt = {0};
if (instruction_type == S86_InstructionType_MOVAccumToMem) {
fmt = S86_STR8(" [%u], ax");
} else {
S86_ASSERT(instruction_type == S86_InstructionType_MOVMemToAccum);
fmt = S86_STR8(" ax, [%u]");
}
S86_PrintLnFmt(fmt.data, addr);
} break;
case S86_InstructionType_REP: { case S86_InstructionType_REP: {
S86_ASSERT(op_code_size == 1); S86_ASSERT(op_code_size == 1);
uint8_t string_op = S86_BufferIteratorNextByte(&buffer_it); uint8_t string_op = S86_BufferIteratorNextByte(&buffer_it);
@ -1220,7 +1209,9 @@ int main(int argc, char **argv)
S86_PrintLnFmt(" %.*s%c", S86_STR8_FMT(string_type), w ? 'w' : 'b'); S86_PrintLnFmt(" %.*s%c", S86_STR8_FMT(string_type), w ? 'w' : 'b');
} break; } break;
// NOTE: Instruction Pattern => [0b000'00000 | DATA-LO | DATA-HI] // NOTE: Instruction Pattern => [0b0000'0000 | DATA-LO | DATA-HI]
case S86_InstructionType_MOVAccumToMem: /*FALLTHRU*/
case S86_InstructionType_MOVMemToAccum: /*FALLTHRU*/
case S86_InstructionType_CALLDirectInterSeg: /*FALLTHRU*/ case S86_InstructionType_CALLDirectInterSeg: /*FALLTHRU*/
case S86_InstructionType_CALLDirectWithinSeg: /*FALLTHRU*/ case S86_InstructionType_CALLDirectWithinSeg: /*FALLTHRU*/
case S86_InstructionType_JMPDirectInterSeg: /*FALLTHRU*/ case S86_InstructionType_JMPDirectInterSeg: /*FALLTHRU*/
@ -1244,6 +1235,10 @@ int main(int argc, char **argv)
uint8_t cs_hi = S86_BufferIteratorNextByte(&buffer_it); uint8_t cs_hi = S86_BufferIteratorNextByte(&buffer_it);
uint16_t cs = S86_CAST(uint16_t)cs_hi << 8 | (S86_CAST(uint16_t)cs_lo); uint16_t cs = S86_CAST(uint16_t)cs_hi << 8 | (S86_CAST(uint16_t)cs_lo);
S86_PrintLnFmt(" %u:%u", cs, data); S86_PrintLnFmt(" %u:%u", cs, data);
} else if (instruction_type == S86_InstructionType_MOVAccumToMem) {
S86_PrintLnFmt(" [%u], ax", data);
} else if (instruction_type == S86_InstructionType_MOVMemToAccum) {
S86_PrintLnFmt(" ax, [%u]", data);
} else { } else {
S86_PrintLnFmt(" %u", data); S86_PrintLnFmt(" %u", data);
} }