perfaware/part1: Support listing 0045
This commit is contained in:
parent
3d29edbfc8
commit
67307e81b8
@ -70,3 +70,10 @@ copy /Y %script_dir%\%listing_0044%.txt %build_dir% 1>NUL
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set build_dir_listing_0044=%build_dir%\%listing_0044%
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%build_dir%\sim8086.exe --exec %build_dir_listing_0044% > %build_dir_listing_0044%_disassembled.txt
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fc /N %build_dir_listing_0044%.txt %build_dir_listing_0044%_disassembled.txt || exit /b 1
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set listing_0045=listing_0045_challenge_register_movs
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copy /Y %script_dir%\%listing_0045% %build_dir% 1>NUL
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copy /Y %script_dir%\%listing_0045%.txt %build_dir% 1>NUL
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set build_dir_listing_0045=%build_dir%\%listing_0045%
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%build_dir%\sim8086.exe --exec %build_dir_listing_0045% > %build_dir_listing_0045%_disassembled.txt
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fc /N %build_dir_listing_0045%.txt %build_dir_listing_0045%_disassembled.txt || exit /b 1
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1
part1/listing_0045_challenge_register_movs
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1
part1/listing_0045_challenge_register_movs
Normal file
@ -0,0 +1 @@
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ｸ""ｻDDｹffｺ<66>社杓蔀ｰｷ3ｱUｶw緯鰯社杓蔀菰互姑荷
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43
part1/listing_0045_challenge_register_movs.asm
Normal file
43
part1/listing_0045_challenge_register_movs.asm
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@ -0,0 +1,43 @@
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; ========================================================================
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;
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; (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved.
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;
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; This software is provided 'as-is', without any express or implied
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; warranty. In no event will the authors be held liable for any damages
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; arising from the use of this software.
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;
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; Please see https://computerenhance.com for further information
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;
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; ========================================================================
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; ========================================================================
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; LISTING 45
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; ========================================================================
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bits 16
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mov ax, 0x2222
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mov bx, 0x4444
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mov cx, 0x6666
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mov dx, 0x8888
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mov ss, ax
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mov ds, bx
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mov es, cx
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mov al, 0x11
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mov bh, 0x33
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mov cl, 0x55
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mov dh, 0x77
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mov ah, bl
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mov cl, dh
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mov ss, ax
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mov ds, bx
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mov es, cx
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mov sp, ss
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mov bp, ds
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mov si, es
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mov di, dx
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35
part1/listing_0045_challenge_register_movs.txt
Normal file
35
part1/listing_0045_challenge_register_movs.txt
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@ -0,0 +1,35 @@
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--- test\listing_0045_challenge_register_movs execution ---
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mov ax, 8738 ; ax:0x0->0x2222
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mov bx, 17476 ; bx:0x0->0x4444
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mov cx, 26214 ; cx:0x0->0x6666
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mov dx, 34952 ; dx:0x0->0x8888
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mov ss, ax ; ss:0x0->0x2222
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mov ds, bx ; ds:0x0->0x4444
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mov es, cx ; es:0x0->0x6666
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mov al, 17 ; ax:0x2222->0x2211
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mov bh, 51 ; bx:0x4444->0x3344
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mov cl, 85 ; cx:0x6666->0x6655
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mov dh, 119 ; dx:0x8888->0x7788
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mov ah, bl ; ax:0x2211->0x4411
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mov cl, dh ; cx:0x6655->0x6677
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mov ss, ax ; ss:0x2222->0x4411
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mov ds, bx ; ds:0x4444->0x3344
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mov es, cx ; es:0x6666->0x6677
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mov sp, ss ; sp:0x0->0x4411
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mov bp, ds ; bp:0x0->0x3344
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mov si, es ; si:0x0->0x6677
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mov di, dx ; di:0x0->0x7788
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Final registers:
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ax: 0x4411 (17425)
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bx: 0x3344 (13124)
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cx: 0x6677 (26231)
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dx: 0x7788 (30600)
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sp: 0x4411 (17425)
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bp: 0x3344 (13124)
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si: 0x6677 (26231)
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di: 0x7788 (30600)
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es: 0x6677 (26231)
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ss: 0x4411 (17425)
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ds: 0x3344 (13124)
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184
part1/sim8086.c
184
part1/sim8086.c
@ -8,10 +8,16 @@ typedef struct RegisterFile {
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uint16_t cx;
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uint16_t dx;
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uint16_t bx;
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uint16_t sp;
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uint16_t bp;
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uint16_t si;
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uint16_t di;
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uint16_t es;
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uint16_t cs;
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uint16_t ss;
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uint16_t ds;
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} RegisterFile;
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S86_Str8 S86_MnemonicStr8(S86_Mnemonic type)
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@ -470,49 +476,64 @@ S86_Opcode S86_DecodeOpcode(S86_BufferIterator *buffer_it,
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case S86_OpDecodeType_LES: /*FALLTHRU*/
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case S86_OpDecodeType_XCHGRegOrMemWithReg: /*FALLTHRU*/
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case S86_OpDecodeType_CMPRegOrMemAndReg: /*FALLTHRU*/
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case S86_OpDecodeType_MOVRegOrMemToOrFromReg: {
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case S86_OpDecodeType_MOVRegOrMemToOrFromReg: /*FALLTHRU*/
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case S86_OpDecodeType_MOVSegRegToRegOrMem: /*FALLTHRU*/
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case S86_OpDecodeType_MOVRegOrMemToSegReg: {
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// NOTE: Instruction does not have opcode bits in the 2nd byte
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S86_ASSERT(op_code_size == 1);
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op_code_bytes[op_code_size++] = S86_BufferIteratorNextByte(buffer_it);
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uint8_t w = (op_code_bytes[0] & 0b0000'0001) >> 0;
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uint8_t d = (op_code_bytes[0] & 0b0000'0010) >> 1;
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if (op_decode_type == S86_OpDecodeType_XCHGRegOrMemWithReg ||
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op_decode_type == S86_OpDecodeType_LEA ||
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op_decode_type == S86_OpDecodeType_LDS ||
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op_decode_type == S86_OpDecodeType_LES) {
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d = 1; // Destintation is always the register
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if (op_decode_type == S86_OpDecodeType_XCHGRegOrMemWithReg) {
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if (*lock_prefix) {
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// NOTE: When we XCHG, NASM complains that the
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// instruction is not lockable, unless, the memory
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// operand comes first. Here we flip the direction
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// to ensure the memory operand is the destination.
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//
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// listing_0042_completionist_decode_disassembled.asm|319| warning: instruction is not lockable [-w+prefix-lock]
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d = 0;
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}
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} else {
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w = 1; // Always 16 bit (load into register)
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}
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if (op_decode_type == S86_OpDecodeType_MOVSegRegToRegOrMem ||
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op_decode_type == S86_OpDecodeType_MOVRegOrMemToSegReg) {
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S86_ASSERT(op_code_size == 2);
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} else {
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S86_ASSERT(op_code_size == 1);
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op_code_bytes[op_code_size++] = S86_BufferIteratorNextByte(buffer_it);
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}
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uint8_t d = 0;
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uint8_t mod = (op_code_bytes[1] & 0b1100'0000) >> 6;
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uint8_t reg = (op_code_bytes[1] & 0b0011'1000) >> 3;
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uint8_t rm = (op_code_bytes[1] & 0b0000'0111) >> 0;
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S86_ASSERT(d < 2);
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S86_ASSERT(w < 2);
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S86_ASSERT(mod < 4);
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S86_ASSERT(reg < 8);
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S86_ASSERT(rm < 8);
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result.wide = w;
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result.src = S86_MnemonicOpFromWReg(result.wide, reg);
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if (op_decode_type == S86_OpDecodeType_MOVRegOrMemToSegReg ||
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op_decode_type == S86_OpDecodeType_MOVSegRegToRegOrMem) {
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uint8_t sr = (op_code_bytes[1] & 0b0001'1000) >> 3;
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result.src = S86_MnemonicOpFromSR(sr);
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result.wide = 1;
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if (op_decode_type == S86_OpDecodeType_MOVRegOrMemToSegReg)
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d = 1;
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} else {
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result.wide = (op_code_bytes[0] & 0b0000'0001) >> 0;
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d = (op_code_bytes[0] & 0b0000'0010) >> 1;
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if (op_decode_type == S86_OpDecodeType_XCHGRegOrMemWithReg ||
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op_decode_type == S86_OpDecodeType_LEA ||
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op_decode_type == S86_OpDecodeType_LDS ||
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op_decode_type == S86_OpDecodeType_LES) {
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d = 1; // Destintation is always the register
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if (op_decode_type == S86_OpDecodeType_XCHGRegOrMemWithReg) {
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if (*lock_prefix) {
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// NOTE: When we XCHG, NASM complains that the
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// instruction is not lockable, unless, the memory
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// operand comes first. Here we flip the direction
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// to ensure the memory operand is the destination.
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//
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// listing_0042_completionist_decode_disassembled.asm|319| warning: instruction is not lockable [-w+prefix-lock]
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d = 0;
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}
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} else {
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result.wide = 1; // Always 16 bit (load into register)
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}
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}
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uint8_t reg = (op_code_bytes[1] & 0b0011'1000) >> 3;
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result.src = S86_MnemonicOpFromWReg(result.wide, reg);
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}
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S86_ASSERT(result.wide < 2);
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S86_ASSERT(d < 2);
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if (mod == 0b11) { // NOTE: Register-to-register move
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result.dest = S86_MnemonicOpFromWReg(result.wide, rm);
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} else { // NOTE: Memory mode w/ effective address calculation
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S86_DecodeEffectiveAddr(&result, buffer_it, rm, mod, w);
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result.src = S86_MnemonicOpFromWReg(w, reg);
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S86_DecodeEffectiveAddr(&result, buffer_it, rm, mod, result.wide);
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if (d)
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result.effective_addr = S86_EffectiveAddress_Src;
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else
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@ -775,6 +796,15 @@ S86_Opcode S86_DecodeOpcode(S86_BufferIterator *buffer_it,
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return result;
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}
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typedef struct S86_MnemonicOpToRegisterFileMap {
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S86_MnemonicOp mnemonic_op; ///< Register/op that the mnemonic is using
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S86_MnemonicOp mnemonic_op_reg16; ///< 16 bit register for the mnemonic op
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uint16_t mask; ///< Mask for the bits that the mnemonic op is using (hi/lo/full bit coverage)
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uint16_t r_shift; ///< Shift amount for isolating the masked value
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uint16_t *reg; ///< Pointer to the register memory this mnemonic op is using
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} S86_MnemonicOpToRegisterFileMap;
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#define PRINT_USAGE S86_PrintLn(S86_STR8("usage: sim8086.exe [--exec] <binary asm file>"))
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int main(int argc, char **argv)
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{
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@ -1118,34 +1148,32 @@ int main(int argc, char **argv)
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S86_MnemonicOp seg_reg = {0};
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bool lock_prefix = false;
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typedef struct MnemonicOpToRegisterFileMap {
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S86_MnemonicOp mnemonic_op;
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uint16_t mask;
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uint16_t r_shift;
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uint16_t *reg;
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} MnemonicOpToRegisterFileMap;
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S86_MnemonicOpToRegisterFileMap mnemonic_op_to_register_file_map[] = {
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{.mnemonic_op = S86_MnemonicOp_AX, .mnemonic_op_reg16 = S86_MnemonicOp_AX, .reg = ®ister_file.ax, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_AL, .mnemonic_op_reg16 = S86_MnemonicOp_AX, .reg = ®ister_file.ax, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_AH, .mnemonic_op_reg16 = S86_MnemonicOp_AX, .reg = ®ister_file.ax, .mask = 0xFF00, .r_shift = 8},
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MnemonicOpToRegisterFileMap mnemonic_op_to_register_file_map[] = {
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{.mnemonic_op = S86_MnemonicOp_AX, .reg = ®ister_file.ax, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_AL, .reg = ®ister_file.ax, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_AH, .reg = ®ister_file.ax, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_CX, .mnemonic_op_reg16 = S86_MnemonicOp_CX, .reg = ®ister_file.cx, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_CL, .mnemonic_op_reg16 = S86_MnemonicOp_CX, .reg = ®ister_file.cx, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_CH, .mnemonic_op_reg16 = S86_MnemonicOp_CX, .reg = ®ister_file.cx, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_CX, .reg = ®ister_file.cx, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_CL, .reg = ®ister_file.cx, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_CH, .reg = ®ister_file.cx, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_DX, .mnemonic_op_reg16 = S86_MnemonicOp_DX, .reg = ®ister_file.dx, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DL, .mnemonic_op_reg16 = S86_MnemonicOp_DX, .reg = ®ister_file.dx, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DH, .mnemonic_op_reg16 = S86_MnemonicOp_DX, .reg = ®ister_file.dx, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_DX, .reg = ®ister_file.dx, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DL, .reg = ®ister_file.dx, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DH, .reg = ®ister_file.dx, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_BX, .mnemonic_op_reg16 = S86_MnemonicOp_BX, .reg = ®ister_file.bx, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_BL, .mnemonic_op_reg16 = S86_MnemonicOp_BX, .reg = ®ister_file.bx, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_BH, .mnemonic_op_reg16 = S86_MnemonicOp_BX, .reg = ®ister_file.bx, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_BX, .reg = ®ister_file.bx, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_BL, .reg = ®ister_file.bx, .mask = 0x00FF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_BH, .reg = ®ister_file.bx, .mask = 0xFF00, .r_shift = 8},
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{.mnemonic_op = S86_MnemonicOp_SP, .mnemonic_op_reg16 = S86_MnemonicOp_SP, .reg = ®ister_file.sp, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_BP, .mnemonic_op_reg16 = S86_MnemonicOp_BP, .reg = ®ister_file.bp, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_SI, .mnemonic_op_reg16 = S86_MnemonicOp_SI, .reg = ®ister_file.si, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DI, .mnemonic_op_reg16 = S86_MnemonicOp_DI, .reg = ®ister_file.di, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_SP, .reg = ®ister_file.sp, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_BP, .reg = ®ister_file.bp, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_SI, .reg = ®ister_file.si, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DI, .reg = ®ister_file.di, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_ES, .mnemonic_op_reg16 = S86_MnemonicOp_ES, .reg = ®ister_file.es, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_CS, .mnemonic_op_reg16 = S86_MnemonicOp_CS, .reg = ®ister_file.cs, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_SS, .mnemonic_op_reg16 = S86_MnemonicOp_SS, .reg = ®ister_file.ss, .mask = 0xFFFF, .r_shift = 0},
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{.mnemonic_op = S86_MnemonicOp_DS, .mnemonic_op_reg16 = S86_MnemonicOp_DS, .reg = ®ister_file.ds, .mask = 0xFFFF, .r_shift = 0},
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};
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while (S86_BufferIteratorHasMoreBytes(buffer_it)) {
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@ -1159,33 +1187,35 @@ int main(int argc, char **argv)
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continue;
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if (exec_mode && opcode.mnemonic == S86_Mnemonic_MOV) {
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MnemonicOpToRegisterFileMap const *dest_map = NULL;
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S86_MnemonicOpToRegisterFileMap const *dest_map = NULL;
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for (size_t index = 0; !dest_map && index < S86_ARRAY_UCOUNT(mnemonic_op_to_register_file_map); index++) {
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MnemonicOpToRegisterFileMap const *item = mnemonic_op_to_register_file_map + index;
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S86_MnemonicOpToRegisterFileMap const *item = mnemonic_op_to_register_file_map + index;
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if (item->mnemonic_op == opcode.dest)
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dest_map = item;
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}
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if (dest_map) {
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uint16_t *dest = dest_map->reg;
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if (opcode.src == S86_MnemonicOp_Immediate) {
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S86_Str8 mnemonic_op = S86_MnemonicOpStr8(dest_map->mnemonic_op);
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S86_PrintFmt(" ; %.*s:0x%x->0x%x ", S86_STR8_FMT(mnemonic_op), *dest, opcode.immediate);
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*dest = (uint16_t)opcode.immediate;
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} else if (opcode.src >= S86_MnemonicOp_AX && opcode.src <= S86_MnemonicOp_DI) {
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MnemonicOpToRegisterFileMap const *src_map = NULL;
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for (size_t index = 0; !src_map && index < S86_ARRAY_UCOUNT(mnemonic_op_to_register_file_map); index++) {
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MnemonicOpToRegisterFileMap const *item = mnemonic_op_to_register_file_map + index;
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if (item->mnemonic_op == opcode.src)
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src_map = item;
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}
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S86_ASSERT(dest_map);
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uint16_t *dest = dest_map->reg;
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uint16_t src = 0;
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S86_Str8 dest_op = S86_MnemonicOpStr8(dest_map->mnemonic_op);
|
||||
uint16_t *src = src_map->reg;
|
||||
S86_PrintFmt(" ; %.*s:0x%x->0x%x ", S86_STR8_FMT(dest_op), *dest, *src);
|
||||
*dest = *src;
|
||||
if (opcode.src == S86_MnemonicOp_Immediate) {
|
||||
src = (uint16_t)opcode.immediate;
|
||||
} else if ((opcode.src >= S86_MnemonicOp_AL && opcode.src <= S86_MnemonicOp_DI) ||
|
||||
(opcode.src >= S86_MnemonicOp_ES && opcode.src <= S86_MnemonicOp_DS)) {
|
||||
S86_MnemonicOpToRegisterFileMap const *src_map = NULL;
|
||||
for (size_t index = 0; !src_map && index < S86_ARRAY_UCOUNT(mnemonic_op_to_register_file_map); index++) {
|
||||
S86_MnemonicOpToRegisterFileMap const *item = mnemonic_op_to_register_file_map + index;
|
||||
if (item->mnemonic_op == opcode.src)
|
||||
src_map = item;
|
||||
}
|
||||
|
||||
src = (*src_map->reg & src_map->mask) >> src_map->r_shift;
|
||||
}
|
||||
|
||||
S86_Str8 dest_reg16 = S86_MnemonicOpStr8(dest_map->mnemonic_op_reg16);
|
||||
uint16_t new_dest = (*dest & ~dest_map->mask) | (src << dest_map->r_shift);
|
||||
S86_PrintFmt(" ; %.*s:0x%x->0x%x ", S86_STR8_FMT(dest_reg16), *dest, new_dest);
|
||||
*dest = new_dest;
|
||||
}
|
||||
S86_Print(S86_STR8("\n"));
|
||||
}
|
||||
@ -1200,6 +1230,12 @@ int main(int argc, char **argv)
|
||||
S86_PrintLnFmt(" bp: 0x%04x (%u)", register_file.bp, register_file.bp);
|
||||
S86_PrintLnFmt(" si: 0x%04x (%u)", register_file.si, register_file.si);
|
||||
S86_PrintLnFmt(" di: 0x%04x (%u)", register_file.di, register_file.di);
|
||||
if (register_file.es)
|
||||
S86_PrintLnFmt(" es: 0x%04x (%u)", register_file.es, register_file.es);
|
||||
if (register_file.ss)
|
||||
S86_PrintLnFmt(" ss: 0x%04x (%u)", register_file.ss, register_file.ss);
|
||||
if (register_file.ds)
|
||||
S86_PrintLnFmt(" ds: 0x%04x (%u)", register_file.ds, register_file.ds);
|
||||
S86_Print(S86_STR8("\n"));
|
||||
}
|
||||
}
|
||||
|
||||
BIN
project.rdbg
BIN
project.rdbg
Binary file not shown.
Loading…
Reference in New Issue
Block a user