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perfaware/part1: Add support for LOCK prefix

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doyle 2023-03-19 17:41:20 +11:00
parent aaa49ffe9f
commit 5e6608aae3
1 changed files with 9 additions and 0 deletions
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9
part1/sim8086.c
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@ -225,6 +225,8 @@ typedef enum S86_InstructionType {
S86_InstructionType_HLT, S86_InstructionType_HLT,
S86_InstructionType_WAIT, S86_InstructionType_WAIT,
S86_InstructionType_LOCK,
S86_InstructionType_Count, S86_InstructionType_Count,
} S86_InstructionType; } S86_InstructionType;
@ -807,6 +809,9 @@ int main(int argc, char **argv)
.op_bits0 = 0b1111'0100, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("hlt")}, .op_bits0 = 0b1111'0100, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("hlt")},
[S86_InstructionType_WAIT] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000, [S86_InstructionType_WAIT] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1001'1011, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("wait")}, .op_bits0 = 0b1001'1011, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("wait")},
[S86_InstructionType_LOCK] = {.op_mask0 = 0b1111'1111, .op_mask1 = 0b0000'0000,
.op_bits0 = 0b1111'0000, .op_bits1 = 0b0000'0000, .mnemonic = S86_STR8("lock")},
}; };
S86_Str8 SEGMENT_REGISTER_NAME[] = { S86_Str8 SEGMENT_REGISTER_NAME[] = {
@ -1251,6 +1256,10 @@ int main(int argc, char **argv)
instruction_type == S86_InstructionType_WAIT) { instruction_type == S86_InstructionType_WAIT) {
// NOTE: Mnemonic instruction only, already printed // NOTE: Mnemonic instruction only, already printed
S86_Print(S86_STR8("\n")); S86_Print(S86_STR8("\n"));
} else if (instruction_type == S86_InstructionType_LOCK) {
// NOTE: Mnemonic prefix, no new line as the next instruction
// will be prefixed with this instruciton
S86_Print(S86_STR8(" "));
} else { } else {
S86_Print(S86_STR8("\n")); S86_Print(S86_STR8("\n"));
S86_ASSERT(!"Unhandled instruction"); S86_ASSERT(!"Unhandled instruction");